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AD5933-Slide33

One final important point to note about the biasing of the circuit shown, the receive side of the AD5933 is hard biased at VDD/2 by design. Therefore, in order to prevent the output of the external amplifier (the attenuated AD5933 Range 1 excitation signal) from saturating the receive side amplifiers of the AD5933, a voltage equal to VDD/2 is required to be applied to the non inverting terminal of the external amplifier.

PTM Published on: 2007-09-17