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As shown above, the transmit stage of the AD5933 is made up of a 27-bit phase accumulator DDS core which provides the output excitation signal at a particular frequency. The input to the phase accumulator is taken from the contents of the START FREQUENCY register (RAM Locations 82h, 83h, and 84h). Although the phase accumulator offers 27 bits of resolution, the START FREQUENCY register has the 3 most significant bits (MSBs) set to 0 internally; therefore the user has the ability to program only the lower 24 bits of the START FREQUENCY register.
PTM Published on: 2007-09-17
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