VIPER26 Datasheet by STMicroelectronics

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Semember 2010 Vou1 5 DDCSon .KE Doc ID 17736 Rev 2
September 2010 Doc ID 17736 Rev 2 1/25
25
VIPER26
Fixed frequency VIPerTM plus family
Features
800 V avalanche rugged power section
PWM operation with frequency jittering for low
EMI
Operating frequency:
60 kHz for L type
115 kHz for H type
Standby power < 50 mW at 265 VAC
Limiting current with adjustable set point
On-board soft-start
Safe auto-restart after a fault condition
Hysteretic thermal shutdown
Application
Auxiliary power supply for appliances
Power metering
LED drivers
SMPS for set-top boxes, DVD players and
recorders
Description
The device is an off-line converter with an 800 V
avalanche ruggedness power section, a PWM
controller, user defined overcurrent limit,
protection against feedback network
disconnection, hysteretic thermal protection, soft
start up and safe auto restart after any fault
condition.
Advance frequency jittering reduces EMI filter
cost. Burst mode operation and the devices very
low consumption both help to meet the standard
set by energy saving regulations.
Figure 1. Typical topology (VOUT VDDCSon)
DIP-7
SO
-
16
SO16 narrow
VIPER26
DRAIN COMP
GND FBLIM
VDD
VIPER26
DRAIN COMP
GND FBLIM
VDD
DC Output Voltage
-
DC Input Voltage
Table 1. Device summary
Order codes Package Packaging
VIPER26LN DIP-7 Tube
VIPER26HN
VIPER26HD
SO16 narrow
Tube
VIPER26HDTR Tape and reel
VIPER26LD Tube
VIPER26LDTR Tape and reel
www.st.com
Contents VIPER26
2/25 Doc ID 17736 Rev 2
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Typical power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Typical circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8 High voltage current generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
10 Soft start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
11 Adjustable current limit set point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12 FB pin and COMP pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
14 Automatic auto restart after overload or short-circuit . . . . . . . . . . . . . 17
15 Open loop failure protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
16 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
:Ln mm 4; HM luuM nmv VDD Wmmmm nummz Oman 7 mm DFINN SUWU s Wm Vw' auRsYMuDE “‘9“ W mm 4 n EquY 7 W“ FB comp GND
VIPER26 Block diagram
Doc ID 17736 Rev 2 3/25
1 Block diagram
2 Typical power
Figure 2. Block diagram
Table 2. Typical power
Part number
230 VAC 85-265 VAC
Adapter(1)
1. Typical continuous power in non ventilated enclosed adapter measured at 50 °C ambient.
Open frame(2)
2. Maximum practical continuous power in an open frame design at 50 °C ambient, with adequate heat
sinking.
Adapter(1) Open frame(2)
VIPER26 18 W 20 W 10 W 12 W
SO16N GND GND vnn UM FE COMP DRAW DRAW DRAM DRAWN N c N c N c N c
Pin settings VIPER26
4/25 Doc ID 17736 Rev 2
3 Pin settings
Figure 3. Connection diagram (top view)
Note: The copper area for heat dissipation has to be designed under the DRAIN pins.
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Table 3. Pin description
Pin n.
Name Function
DIP-7 SO16
11-2GND
Connected to the source of the internal power MOSFET and controller
ground reference.
-4N.A.
Not available for user. It can be connected to GND (pins 1-2) or left not
connected.
25VDD
Supply voltage of the control section. This pin provides the charging current
of the external capacitor.
36LIM
This pin allows setting the drain current limitation. The limit can be reduced
by connecting an external resistor between this pin and GND. Pin left open if
default drain current limitation is used.
47FB
Inverting input of the internal trans conductance error amplifier. Connecting
the converter output to this pin through a single resistor results in an output
voltage equal to the error amplifier reference voltage (See VFB_REF on
Table 7). An external resistors divider is required for higher output voltages.
58COMP
Output of the internal trans conductance error amplifier. The compensation
network have to be placed between this pin and GND to achieve stability and
good dynamic performance of the voltage control loop. The pin is used also
to directly control the PWM with an
optocoupler. The linear voltage range extends from VCOMPL to VCOMPH
(Table 7).
7,8 13-16 DRAIN
High voltage drain pin. The built-in high voltage switched start-up bias
current is drawn from this pin too.
Pins connected to the metal frame to facilitate heat dissipation.
VIPER26 Electrical data
Doc ID 17736 Rev 2 5/25
4 Electrical data
4.1 Maximum ratings
4.2 Thermal data
Table 4. Absolute maximum ratings
Symbol Pin
(DIP-7) Parameter
Value
Unit
Min Max
VDRAIN 7, 8 Drain-to-source (ground) voltage 800 V
EAV 7, 8 Repetitive avalanche energy (limited by TJ = 150 °C) 5 mJ
IAR 7, 8 Repetitive avalanche current (limited by TJ = 150 °C) 1.5 A
IDRAIN 7, 8 Pulse drain current (limited by TJ = 150 °C) 3 A
VCOMP 5 Input pin voltage -0.3 3.5 V
VFB 4 Input pin voltage -0.3 4.8 V
VLIM 3 Input pin voltage -0.3 2.4 V
VDD 2 Supply voltage -0.3 Self
limited V
IDD 2 Input current 20 mA
PTOT
Power dissipation at TA < 40 °C (DIP-7) 1 W
Power dissipation at TA < 60 °C (SO16N) 1.5 W
TJOperating junction temperature range -40 150 °C
TSTG Storage temperature -55 150 °C
Table 5. Thermal data
Symbol Parameter
Max value
Unit
SO16N DIP-7
RthJP
Thermal resistance junction pin
(Dissipated power = 1 W) 25 35 °C/W
RthJA
Thermal resistance junction ambient
(Dissipated power = 1 W) 60 100 °C/W
RthJA
Thermal resistance junction ambient (1)
(Dissipated power = 1 W)
1. When mounted on a standard single side FR4 board with 100 mm2 (0.155 sq in) of Cu (35 µm thick)
50 80 °C/W
Electrical data VIPER26
6/25 Doc ID 17736 Rev 2
4.3 Electrical characteristics
(TJ = -25 to 125 °C, VDD = 14 V (a); unless otherwise specified)
a. Adjust VDD above VDDon startup threshold before setting to 14 V
Table 6. Power section
Symbol Parameter Test condition Min Typ Max Unit
VBVDSS Break-down voltage IDRAIN = 1 mA,
VCOMP = GND, TJ = 25 °C 800 V
IOFF OFF state drain current VDRAIN = max rating,
VCOMP = GND 60 µA
RDS(on)
Drain-source on state
resistance
IDRAIN = 0.2 A, TJ = 25 °C 7
IDRAIN = 0.2 A, TJ = 125 °C 14
COSS
Effective (energy related)
output capacitance VDRAIN = 0 to 640 V 40 pF
Table 7. Supply section
Symbol Parameter Test condition Min Typ Max Unit
Volt ag e
VDRAIN_START Drain-source start voltage 60 80 100 V
IDDch1
Charging current during the
start up
VDRAIN = 100 V to 640 V,
VDD = 4 V -0.6 -1.8 mA
IDDch2
Charging current during the
autorestart
VDRAIN = 100 V to 640 V,
VDD = 9 V falling edge -7 -13 mA
VDD Operating voltage range 11.5 23.5 V
VDDclamp VDD clamp voltage IDD = 15 mA 23.5 V
VDDon VDD start up threshold 12 13 14 V
VDDCSon
VDD on internal high voltage
current generator threshold 9.5 10.5 11.5 V
VDDoff
VDD under voltage shutdown
threshold 789V
Current
IDD0
Operating supply current, not
switching
FOSC = 0 kHz,
VCOMP = GND 0.6 mA
IDD1
Operating supply current,
switching
VDRAIN = 120 V,
FSW = 60 kHz 2.5 mA
VDRAIN = 120 V,
FSW = 115 kHz 3.5 mA
IDDoff
Operating supply current with
VDD < VDDoff
VDD < VDDoff 0.35 mA
IDDol
Open loop failure current
threshold
VDD = VDDclamp
VCOMP = 3.3 V, 4mA
VIPER26 Electrical data
Doc ID 17736 Rev 2 7/25
Table 8. Controller section
Symbol Parameter Test condition Min Typ Max Unit
Error amplifier
VREF_FB FB reference voltage 3.2 3.3 3.4 V
IFB_PULL UP Current pull up -1 µA
GMTrans conductance 2 mA/V
Current setting (LIM) pin
VLIM_LOW Low level clamp voltage ILIM = -100 µA0.5V
Compensation (COMP) pin
VCOMPH Upper saturation limit TJ = 25 °C 3 V
VCOMPL Burst mode threshold TJ = 25 °C 1 1.1 1.2 V
VCOMPL_HYS Burst mode hysteresis TJ = 25 °C 40 mV
HCOMP VCOMP / IDRAIN 3V/A
RCOMP(DYN) Dynamic resistance VFB = GND 15 k
ICOMP
Source / sink current VFB > 100 mV 150 µA
Max source current VCOMP = GND, VFB = GND 220 µA
Current limitation
IDlim Drain current limitation ILIM = -10 µA, VCOMP = 3.3 V, TJ = 25 °C 0.66 0.7 0.74 A
tSS Soft-start time 8.5 ms
TON_MIN Minimum turn ON time 480 ns
IDlim_bm Burst mode current limitation VCOMP = VCOMPL 145 mA
Overload
tOVL Overload time 50 ms
tRESTART Restart time after fault 1 s
Oscillator section
FOSC Switching frequency VIPER26L 54 60 66 kHz
VIPER26H 103 115 127 kHz
FDModulation depth FOSC = 60 kHz ±4 kHz
FOSC = 115 kHz ±8 kHz
FMModulation frequency 230 Hz
DMAX Maximum duty cycle 70 80 %
Thermal shutdown
TSD Thermal shutdown temperature 150 160 °C
THYST Thermal shutdown hysteresis 30 °C
Typical electrical characteristics VIPER26
8/25 Doc ID 17736 Rev 2
5 Typical electrical characteristics
Figure 4. IDlim vs TJ Figure 5. FOSC vs TJ
Figure 6. VDRAIN_START vs TJFigure 7. HCOMP vs TJ
Figure 8. GM vs TJFigure 9. VREF_FB vs TJ
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VIPER26 Typical electrical characteristics
Doc ID 17736 Rev 2 9/25
Figure 10. ICOMP vs TJFigure 11. Operating supply current
(no switching) vs TJ
Figure 12. Operating supply current
(switching) vs TJ
Figure 13. IDlim vs RLIM
Figure 14. Power MOSFET on-resistance vs TJFigure 15. Power MOSFET break down voltage
vs TJ
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Typical circuits Figure 17. Buck converter (Vou'r>VDDCSon) z: AiN TIT
Typical circuits VIPER26
10/25 Doc ID 17736 Rev 2
Figure 16. Thermal shutdown
6 Typical circuits
Figure 17. Buck converter (VOUT>VDDCSon)
T
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DRAIN
VDDon
time
VDDCSon
VDDoff
TSD
time
time
TSD -THYST
Shut down after over temperature
Normal operation Normal operation
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VIPER26 Typical circuits
Doc ID 17736 Rev 2 11/25
Figure 18. Fly-back converter (isolated)
Figure 19. Flyback converter (primary regulation)
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Typical circuits VIPER26
12/25 Doc ID 17736 Rev 2
Figure 20. Flyback converter (non isolated, VOUTmVDDCSon)
Figure 21. Flyback converter (non isolated, VOUT[VDDCSon)
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VIPER26 Power section
Doc ID 17736 Rev 2 13/25
7 Power section
The power section is implemented with an n-channel power MOSFET with a breakdown
voltage of 800 V min. and a typical RDS(on) of 7 . It includes a SenseFET structure to allow
a virtually lossless current sensing and the thermal sensor.
The gate driver of the power MOSFET is designed to supply a controlled gate current during
both turn-ON and turn-OFF in order to minimize common mode EMI. During UVLO
conditions, an internal pull-down circuit holds the gate low in order to ensure that the power
MOSFET cannot be turned ON accidentally.
8 High voltage current generator
The high voltage current generator is supplied by the DRAIN pin. At the first start up of the
converter, it is enabled when the voltage across the input bulk capacitor reaches the
VDRAIN_START threshold, sourcing the IDDch1 current (see Table 7 on page 6); as the VDD
voltage reaches the VDDon start-up threshold, the power section starts switching and the
high voltage current generator is turned OFF. The VIPer26 is powered by the external
source. After the start-up, the auxiliary winding or the diode connected to the output voltage
have to power the VDD capacitor with voltage higher than VDDCSon threshold (see Table 7
on page 6). During the switching, the internal current source is disabled and the
consumptions are minimized. In case of fault the switching is stopped and the device is self
biased by the internal high voltage current source; it is activated between the levels VDDCSon
and VDDon delivering the current IDDch2 to the VDD capacitor during the MOSFET off time,
see Figure 22 on page 13.
At converter power-down, the VDD voltage drops and the converter activity stops as it falls
below VDDoff threshold (see Table 7 on page 6).
Figure 22. Power on and power off
IDD
VDD
VDRAIN
V
DDon
time
VIN
V
DRAIN_START
Power-on Power-off
Normal operation
regulation is lost here
V
IN
< V
DRAIN_START
HV startup is no more activated
V
DDCSon
V
DDoff
I
DDch1
I
DDch2
time
time
time
Oscillator VIPER26
14/25 Doc ID 17736 Rev 2
9 Oscillator
The switching frequency is internally fixed at 60 kHz (VIPER26LN or LD) or 115 kHz
(VIPER26HN or HD).
In both cases the switching frequency is modulated by approximately ±4 kHz (60 kHz
version) or ±8 kHz (115 kHz version) at 230 Hz (typical) rate, so that the resulting spread-
spectrum action distributes the energy of each harmonic of the switching frequency over a
number of sideband harmonics having the same energy on the whole but smaller
amplitudes.
10 Soft start-up
During the converters' start-up phase, the soft-start function progressively increases the
cycle-by-cycle drain current limit, up to the default value IDlim. By this way the drain current is
further limited and the output voltage is progressively increased reducing the stress on the
secondary diode. The soft-start time is internally fixed to tSS, see typical value on Table 8 on
page 7, and the function is activated for any attempt of converter start-up and after a fault
event.
This function helps prevent transformers' saturation during start-up and short-circuit.
11 Adjustable current limit set point
The VIPer26 includes a current mode PWM controller: cycle by cycle the drain current is
sensed through the integrated resistor RSENSE and the voltage is applied to the non
inverting input of the PWM comparator, see Figure 2 on page 3. As soon as the sensed
voltage is equal to the voltage derived from the COMP pin, the power MOSFET is switched
OFF.
In parallel with the PWM operations, the comparator OCP, see Figure 2 on page 3, checks
the level of the drain current and switch OFF the power MOSFET in case the current is
higher than the threshold IDlim, see Table 8 on page 7.
The level of the drain current limit, IDlim, can be reduced depending from the sunk current
from the pin LIM. The resistor RLIM, between LIM and GND pins, fixes the current sunk and
than the level of the current limit, IDlim, see Figure 13 on page 9.
When the LIM pin is left open or if the RLIM has an high value (i.e. > 80 k) the current limit
is fixed to its default value, IDlim, as reported on Table 8 on page 7.
J \smauun No Rx, \smauun COMP Doc
VIPER26 FB pin and COMP pin
Doc ID 17736 Rev 2 15/25
12 FB pin and COMP pin
The device can be used both in non-isolated and in isolated topology. In case of non-
isolated topology, the feedback signal from the output voltage is applied directly to the FB
pin as inverting input of the internal error amplifier having the reference voltage, VREF_FB,
see the Table 8 on page 7.
The output of the error amplifier sources and sinks the current, ICOMP
, respectively to and
from the compensation network connected on the COMP pin. This signal is then compared,
in the PWM comparator, with the signal coming from the SenseFET; the power MOSFET is
switched off when the two values are the same on cycle by cycle basis. See the Figure 2 on
page 3 and the Figure 23 on page 15.
When the power supply output voltage is equal to the error amplifier reference voltage,
VREF_FB, a single resistor has to be connected from the output to the FB pin. For higher
output voltages the external resistor divider is needed. If the voltage on FB pin is
accidentally left floating, an internal pull-up protects the controller.
The output of the error amplifier is externally accessible through the COMP pin and it’s used
for the loop compensation: usually an RC network.
As reported on Figure 23 on page 15, in case of isolated power supply, the internal error
amplifier has to be disabled (FB pin shorted to GND). In this case an internal resistor is
connected between an internal reference voltage and the COMP pin, see the Figure 23 on
page 15. The current loop has to be closed on the COMP pin through the opto-transistor in
parallel with the compensation network. The VCOMP dynamics ranges is between VCOMPL
and VCOMPH as reported on Figure 24 on page 16.
When the voltage VCOMP drops below the voltage threshold VCOMPL, the converter enters
burst mode, see Section 13 on page 16.
When the voltage VCOMP rises above the VCOMPH threshold, the peak drain current will
reach its limit, as well as the deliverable output power
Figure 23. Feedback circuit
FB
COMP
Without Isolation:
switch open & E/A enabled
With Isolation:
switch closed & E/A disabled
No
Isolation
V
OUT
+
-
PWM stop
from R
SENSE
R
Isolation
R
L
nR
SW
V
REF
R
COMP
+
-
E/A
BUS
+
-
to PWM
V
COMPL
R
HV
REF_FB
16/25 m... Doc ID 17736 Rev 2
Burst mode VIPER26
16/25 Doc ID 17736 Rev 2
13 Burst mode
When the voltage VCOMP drops below the threshold, VCOMPL, the power MOSFET is kept in
OFF state and the consumption is reduced to IDD0 current, as reported on Table 7 on
page 6. As reaction at the energy delivery stop, the VCOMP voltage increases and as soon
as it exceeds the threshold VCOMPL + VCOMPL_HYS, the converter starts switching again with
consumption level equal to IDD1 current. This ON-OFF operation mode, referred to as “burst
mode” and reported on Figure 25 on page 16, reduces the average frequency, which can go
down even to a few hundreds hertz, thus minimizing all frequency-related losses and
making it easier to comply with energy saving regulations. During the burst mode, the drain
current limit is reduced to the value IDlim_bm (reported on Table 8 on page 7) in order to
avoid the audible noise issue.
Figure 25. Load-dependent operating modes: timing diagrams
Figure 24. COMP pin voltage versus IDLIM
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9
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'OLP
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9
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time
time
time
V
COMP
V
COMPL
+V
COMPL_HYS
V
COMPL
I
DD1
I
DD0
I
DD
I
DRAIN
I
Dlim_bm
Burst Mode
( lxmnlv 1mm" '15 ~ m: mm‘ mm lowerar aqua/la m: Mme xm hm: Doc ID 17736 Rev 2
VIPER26 Automatic auto restart after overload or short-circuit
Doc ID 17736 Rev 2 17/25
14 Automatic auto restart after overload or short-circuit
The overload protection is implemented in automatic way using the integrated up-down
counter. Every cycle, it is incremented or decremented depending if the current logic detects
the limit condition or not. The limit condition is the peak drain current, IDlim , reported on
Table 8 on page 7 or the one set by the user through the RLIM resistor, as reported in
Figure 13 on page 9.
After the reset of the counter, if the peak drain current is continuously equal to the level IDlim,
the counter will be incremented till the fixed time, tOVL, after that will be disabled the power
MOSFET switch ON. It will be activated again, through the soft start, after the tRESTART time,
see the Figure 26 on page 17 and the mentioned time values on Table 8 on page 7.
In case of overload or short-circuit event, the power MOSFET switching will be stopped after
a time that depends from the counter and that can be as maximum equal to tOVL. The
protection will occur in the same way until the overload condition is removed, see Figure 26
on page 17.
This protection ensures restart attempts of the converter with low repetition rate, so that it
works safely with extremely low power throughput and avoiding the IC overheating in case of
repeated overload events.
If the overload is removed before the protection tripping, the counter will be decremented
cycle by cycle down to zero and the IC will not be stopped.
Figure 26. Timing diagram: OLP sequence
time
time
V
DD
V
DDon
V
DDCSon
I
DRAIN
I
Dlim_bm
t
1*
* The time t
1
can be lower or equal to the time t
OVL
t
RESTART
t
SS
t
OVL
t
RESTART
t
SS
t
OVL
t
RESTART
t
SS
SHORT CIRCUIT
OCCURS HERE
SHORT CIRCUIT
REMOVED HERE
Open loop failure protection VIPER26
18/25 Doc ID 17736 Rev 2
15 Open loop failure protection
In case the power supply is built in fly-back topology and the VIPer26 is supplied by an
auxiliary winding, as shown in Figure 27 on page 18 and Figure 28 on page 19, the
converter is protected against feedback loop failure or accidental disconnections of the
winding.
The following description is applicable for the schematics of Figure 27 on page 18 and
Figure 28 on page 19, respectively the non-isolated fly-back and the isolated fly-back.
If RH is opened or RL is shorted, the VIPer26 works at its drain current limitation. The output
voltage, VOUT
, will increase and so the auxiliary voltage, VAUX, which is coupled with the
output through the secondary-to-auxiliary turns ratio.
As the auxiliary voltage increases up to the internal VDD active clamp, VDDclamp (the value is
reported on Table 8 on page 7) and the clamp current injected on VDD pin exceeds the
latch threshold, IDDol (the value is reported on Table 8 on page 7), a fault signal is internally
generated.
In order to distinguish an actual malfunction from a bad auxiliary winding design, both the
above conditions (drain current equal to the drain current limitation and current higher than
IDDol through VDD clamp) have to be verified to reveal the fault.
If RL is opened or RH is shorted, the output voltage, VOUT
, will be clamped to the reference
voltage VREF_FB (in case of non isolated fly-back) or to the external TL voltage reference (in
case of isolated fly-back).
Figure 27. FB pin connection for non-isolated fly-back
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VIPER26 Open loop failure protection
Doc ID 17736 Rev 2 19/25
Figure 28. FB pin connection for isolated fly-back
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2C
2(
#COMP
07-ST OP
2
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Package mechanical data VIPER26
20/25 Doc ID 17736 Rev 2
16 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 9. DIP-7 mechanical data
Dim.
mm
Typ Min Max
A 5.33
A1 0.38
A2 3.30 2.92 4.95
b 0.46 0.36 0.56
b2 1.52 1.14 1.78
c 0.25 0.20 0.36
D 9.27 9.02 10.16
E 7.87 7.62 8.26
E1 6.35 6.10 7.11
e 2.54
eA 7.62
eB 10.92
L 3.30 2.92 3.81
M 2.508
N 0.50 0.40 0.60
N1 0.60
O 0.548
EAL/GE PLANE a 38
VIPER26 Package mechanical data
Doc ID 17736 Rev 2 21/25
Figure 29. DIP-7 package dimensions
Package mechanical data VIPER26
22/25 Doc ID 17736 Rev 2
Table 10. SO16N mechanical data
Dim.
mm
Min Typ Max
A 1.75
A1 0.1 0.25
A2 1.25
b 0.31 0.51
c 0.17 0.25
D 9.8 9.9 10
E 5.866.2
E1 3.8 3.9 4
e 1.27
h 0.25 0.5
L 0.4 1.27
k 0 8
ccc 0.1
mzfim 540 SE mwd @wa mzjm ozEQm m:
VIPER26 Package mechanical data
Doc ID 17736 Rev 2 23/25
Figure 30. SO16N package dimensions
Revision history VIPER26
24/25 Doc ID 17736 Rev 2
17 Revision history
Table 11. Document revision history
Date Revision Changes
26-Aug-2010 1Initial release.
01-Sep-2010 2 Updated Figure 30 on page 23.
VIPER26
Doc ID 17736 Rev 2 25/25
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