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Si540 XO Ultra-Low Jitter Oscillator

Silicon Labs low jitter oscillator utilizes DSPLL technology to enable any output frequency

Image of Silicon Labs Si540 XO Ultra Low Jitter OscillatorSilicon Labs Si540 utilizes advanced 4th generation DSPLL technology to provide an ultra-low jitter, low phase noise clock at any output frequency. The Si540 uses one simple crystal and a DSPLL IC-based technique to provide the desired output frequency. The device is factory-programmed to any frequency from 0.2 MHz to 800 MHz with <1 ppb resolution and maintains exceptionally low jitter for both integer and fractional frequencies across its operating range. The Si540 offers excellent reliability and frequency stability as well as guaranteed aging performance. On-chip power supply filtering provides industry-leading power supply noise rejection, simplifying the task of generating low jitter clocks in noisy systems that use switched-mode power supplies. The Si540 is available in a small industry-standard 3.2 mm × 5 mm footprint package, which is ideal for space constrained designs.

Features Applications
  • Available with any frequency from 0.2 MHz to 800 MHz
  • Very low jitter: 125 fs typ RMS (12 kHz to 20 MHz)
  • Excellent PSRR and supply noise immunity: -80 dBc typ
  • 3x tighter stability than SAW oscillators
  • 3.3 V, 2.5 V, and 1.8 V VDD supply operation from the same part number
  • LVPECL, LVDS, CML, HCSL, CMOS, and dual CMOS output options
  • 3.2 mm × 5 mm package footprint
  • 100G/400G OTN, coherent optics
  • 10G/40G/100G optical Ethernet
  • 3G-SDI/12G-SDI/24G-SDI broadcast video
  • Datacenter
  • Test and measurement
  • Clock and data recovery
  • FPGA/ASIC clocking

Silicon Labs Si540 Press Release

Published: 2017-08-09